Microelectronic devices such as IC (integrated circuit) packages may include structures carrying signals presenting a risk of causing electromagnetic interference (EMI) with other systems. For example, processors may be mounted on a first surface of a substrate that contains conductive traces which redistribute the electrical contacts of the processor to other locations on the opposite side of the substrate, to facilitate attachment to other components. In some forms of such IC packages, some of the conductive traces will carry input/output signals presenting a risk of EMI with other semiconductor devices either within the IC package or located nearby.
Conventional mechanisms for addressing the risks of such EMI interference include moving other semiconductor devices a further distance from the processor substrate (or other device carrying the EMI-inducing signals) which increases the X-Y area required for the system. In other microelectronic devices, some structures provide shielding to minimize such EMI by adding one or more layers to the substrate including metal strips or a metal plate. The adding of these additional layer to the substrate not only add cost to the substrate, but the added layers also increase the overhaul height of the substrate (i.e., the Z-height) thereby increasing the overall package Z-height, which is undesirable for many applications. As a result of these disadvantages, another solution is needed.